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 FSLV16211 24-Bit Bus Switch
February 2001 Revised March 2003
FSLV16211 24-Bit Bus Switch
General Description
The FSLV16211 is a 24-bit, high speed, low voltage bus switch. The low On Resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. This device's design allow this part to be used as a 12-bit or 24-bit bus switch. When OE1 is LOW, Port 1A is connected to Port 1B. When OE2 is LOW, Port 2A is connected to Port 2B.
Features
s 5 switch connection between two ports s Minimal propagation delay through the switch s Low lCC s Zero bounce in flow-through mode s Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Ordering Code:
Order Number FSLV16211G (Note 1)(Note 2) FSLV16211MTD (Note 2) Package Number BGA54A MTD56 Package Description 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 1: Ordering code "G" indicates Trays. Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Diagram
(c) 2003 Fairchild Semiconductor Corporation
DS500451
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FSLV16211
Connection Diagrams
Pin Assignment for TSSOP
Pin Descriptions
Pin Name OE1, OE2 1A, 2A 1B, 2B NC Description Bus Switch Enables Bus A Bus B No Connect
FBGA Pin Assignments
1 A B C D E F G H J 1A2 1A4 1A6 1A10 1A12 2A4 2A6 2A8 2A12 2 1A1 1A3 1A5 1A9 1A11 2A3 2A5 2A7 2A11 3 NC 1A7 GND 1A8 2A1 2A2 VCC 2A9 2A10 4 OE2 OE1 1B7 1B8 2B1 2B2 GND 2B9 2B10 5 1B1 1B3 1B5 1B9 1B11 2B3 2B5 2B7 2B11 6 1B2 1B4 1B6 1B10 1B12 2B4 2B6 2B8 2B12
Truth Table
Inputs OE1 L L Pin Assignment for FBGA H H OE2 L H L H Inputs/Outputs 1A, 1B 1A = 1B 1A = 1B Z Z 2A, 2B 2A = 2B Z 2A = 2B Z
(Top Thru View)
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FSLV16211
Absolute Maximum Ratings(Note 3)
Supply Voltage (VCC) DC Switch Voltage (VS) DC Input Voltage (VIN) (Note 4) DC Input Diode Current (lIK) VIN < 0V DC Output (IOUT) Sink Current DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG)
-0.5V to +4.6V -0.5V to +4.6V -0.5V to +4.6V -50 mA
128 mA
Recommended Operating Conditions (Note 5)
Power Supply Operating (VCC) Input Voltage (VIN) Output Voltage (VOUT) Input Rise and Fall Time (tr, tf) Switch Control Input Switch I/O Free Air Operating Temperature (TA) 0 ns/V to 4 ns/V 0 ns/V to DC -40 C to +85 C 2.3V to 3.6V 0V to 3.6V 0V to 3.6V
+/- 100 mA -65C to +150 C
Note 3: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 4: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 5: Unused control inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics (Note: Not all conditions may appear on all switch types)
Symbol VIK VIH VIL II Parameter Clamp Diode Voltage HIGH Level Control Input Voltage LOW Level Control Input Voltage Input Leakage Current VCC (V) 3.0 2.3 - 2.7 2.7 - 3.6 2.3 - 2.7 2.7 - 3.6 2.3 0.0 3.6 ICC ICC IOZ RON Quiescent Supply Current Increase in ICC per Input OFF-STATE Leakage Switch On Resistance 3.6 3.6 3.6 3.0 3.0 3.0 3.0 2.3 2.3 2.3 2.3 5.0 5.0 10.0 5.0 5.0 10.0 1.7 2.0 0.7 0.8 10.0 10.0 1.0 10.0 300.0 1.0 7.0 7.0 15.0 20.0 8.0 8.0 15.0 20.0 A A A A Min TA = -40 C to +85 C Typ Max -1.2 Units V V V Force VI = 3.6V, IOUT = 0.0A Force VI = 3.6V 0 VIN 3.6V VIN = VCC or GND, IOUT = 0A One Input @ 3V, Other Inputs at VCC or GND 0.0 A, B 3.6V IIN = 64 mA, VI = 0.0V IIN = 30 mA, VI = 0.0V IIN = 15 mA, VI = 2.4V IIN = 15 mA, VI = 3.0V IIN = 64 mA, VI = 0.0V IIN = 30 mA, VI = 0.0V IIN = 15 mA, VI = 1.7V IIN = 15 mA, VI = 2.0V Conditions IIN = -18 mA
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FSLV16211
AC Electrical Characteristics
TA = -40 C to +85 C, Symbol Parameter CL = 30pF, RL = 500 VCC = 2.5V 0.20V Min tPHL, tPLH tPHZ, tPLZ tPZH, tPZL Propagation Delay (Note 6) Enable Time Disable Time 0.5 0.5 Max 0.15 4.7 5.1 1.0 1.0 TA = -40 C to +85 C, CL = 50pF, RL = 500 VCC = 3.3V 0.30V Min Max 0.25 7.0 5.5 ns ns ns Units
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the switch and the load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol CIN CI/O
(Note 7)
Parameter Typ 4.5 6.5 Max Units pF pF VCC = 3.3V VCC, OE = 3.3V Conditions
Control Pin Input Capacitance Input/Output Capacitance
Note 7: TA = +25C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Test tPD tPLZ/tPZL tPHZ/tPZH
Note: CL includes load and stray capacitance Note: Input PRR = 1.0 MHz, tW = 500 ns
Switch Open VIN GND
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
VCC Symbol VMI VMO VMVO VIN VCCV tr/tf 3.3V 0.3V 1.5V 1.5V 0.3V 6.0V 3.0 2 ns 2.5V 0.2V VCC/2 VCC/2 0.15V 2 x VCC VCC 2.5 ns
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FSLV16211
Physical Dimensions inches (millimeters) unless otherwise noted
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A
5
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FSLV16211 24-Bit Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild's proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com


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